The invention relates generally to metal-oxide-semiconductor transistors and more particularly to a double-diffused metal-oxide-semiconductor transistor that is conductivity-modulated by minority carrier injection.
Double-diffused metal-oxide-semiconductor (DMOS) transistors are often used in high voltage and/or high current applications. The steady-state power dissipation of a DMOS transistor used as a switch is a function of both its on-resistance and the operating current. The power dissipation can be reduced by decreasing the on-resistance of the DMOS transistor. However, since MOS transistors are minority carrier devices, the on-resistance of a DMOS transistor is inversely proportional to its surface area. That is, any reduction in the on-resistance is, to the first order, proportional to the increase in surface area.
In FIG. 1, a conventional lateral DMOS transistor 10 is shown. The DMOS transistor includes a P-type substrate 12, a lightly doped N-type region 14, a heavily doped N-type source region 16, a heavily doped N-type drain region 18, and a P-type body region 20. The transistor further includes two metallization layers 22 and 24 and a gate 26, located within an insulation layer 28. The metallization layer 22 is positioned over the source and body regions 16 and 20, while the metallization layer 24 is positioned over the drain region 18. The transistor is a three terminal device. Therefore, various components of the lateral DMOS transistor are electrically connected to a gate terminal 30, a source-body terminal 32 and a drain terminal 34. The gate terminal 30 is electrically connected to the gate, which controls the conductive state of the transistor. The source-body terminal 32 is electrically connected to the source and body regions via the metallization layer 22, while the drain terminal 34 is electrically connected to the drain region via the metallization layer 24.
The voltage drop across a DMOS transistor, such as the lateral DMOS transistor 10, for a given current can be decreased by introducing minority carriers into the drift region of the device, e.g., the lightly doped N-type region 14. Several techniques have been proposed for introducing these minority carriers in a DMOS transistor structure.
One such technique is described in a paper entitled xe2x80x9c350v Carrier Injection Field Effect Transistor (CIFET) with Very Low On-Resistance and High Switching Speed,xe2x80x9d by Sugawara et al., Proceedings of the 7th International Symposium on Power Semiconductor Devices and ICs, May 23-25, 1995. The paper describes a DMOS transistor that includes a P-type injector region near the drain of the transistor. The P-type injector region is connected to an extra terminal that can supply voltage (or current) to the P-type injector region. The supplied voltage induces the P-type injector region to inject minority carriers into the transistor, which reduces the on-resistance of the device. Although this technique can provide a significant reduction in the voltage drop across the device, there are concerns with the technique because of the difficult requirements that must be satisfied before the device can be successfully implemented.
One of the requirements that must be satisfied is that a fourth device lead is needed to supply voltage to the P-type injector region. In addition, the required voltage must be greater than the drain voltage to induce the P-type injector region to introduce minority carriers. Consequently, another requirement is that off-device circuitry is needed to provide this required voltage. Still another requirement is that the introduction of the minority carriers must be synchronized with the activation and deactivation of the device.
Other techniques are described in a number of U.S. patents. U.S. Pat. No. 4,831,423 to Shannon discloses a lateral DMOS transistor that includes a minority-carrier injector and at least one floating injector region located between the source and the drain. The floating injector region is intended to spread the minority-carrier injection from the vicinity of the minority-carrier injector into the body region of the device that is remote from the injector, so that conductivity modulation is provided in the remote body region. U.S. Pat. No. 4,952,992 to Blanchard, an inventor of the invention described herein, discloses a vertical DMOS transistor that utilizes a Schottky-barrier diode that functions as a minority-carrier injector. In several embodiments, the Schottky-barrier diode of the Blanchard transistor is electrically connected to the gate terminal to receive the voltage applied to that terminal in order to forward-bias the diode for minority-carrier injection. Thus, the transistor of Blanchard can be a three terminal device.
Although these devices operate well for their intended purposes, what is needed is a DMOS transistor structure having a minority-carrier injector that does not require an external voltage source to introduce minority carriers into the transistor.
A semiconductor device and a method of modulating the conductivity of a DMOS transistor included in the device utilize photocurrent generated by a photodetector for minority-carrier injection. The injection of minority carriers into the DMOS transistor of the device reduces the on-resistance of the transistor. The semiconductor device may be used in an optocoupling application.
In a first embodiment, the semiconductor device includes a lateral DMOS transistor, a minority-carrier injector, and a photodetector. In a preferred embodiment, the semiconductor device is an integrated device, such that the transistor, the injector and the photodetector are collectively formed on a single semiconductive substrate. The minority-carrier injector of the device is located near the drain region of the lateral DMOS transistor to introduce minority carriers into the drift region of the transistor. The minority-carrier injector is a P-type subregion of a lightly doped N-type region of the device.
The photodetector of the device includes at least one electrically isolated photodiode. As an example, the photodetector may include two dielectrically isolated photodiodes. The photodiodes are serially connected between the drain terminal of the transistor and the minority-carrier injector. The connection to the minority-carrier injector allows the photocurrent generated by the photodiodes to be transmitted to the injector to provide the current/voltage needed by the injector to introduce minority carriers into the transistor. The connection to the drain terminal ensures that the voltage applied to the injector, when the photodetector is generating photocurrent, is maintained at a higher voltage than the drain voltage applied to the drain terminal, even if the drain voltage is fluctuating. The photodiodes are formed in an area of the device that would otherwise be xe2x80x9cwastedxe2x80x9d by the drain of the DMOS transistor. The number of photodiodes included in the photodetector is not critical to the invention.
In a second embodiment, the semiconductor device includes a vertical DMOS transistor, instead of a lateral DMOS transistor. However, the structural configuration of the minority-carrier injector and the photodetector in the second embodiment may be identical to the first embodiment. For both embodiments, the operation of the semiconductor device with respect to conductivity modulation of the DMOS transistor is essentially the same.
A method of modulating the conductivity of a DMOS transistor of an integrated semiconductor device in accordance with the present invention includes providing incident light on the surface of a photodetector of the semiconductor device. The incident light may be provided by an LED that is positioned near the surface of the photodetector. Next, the photodiodes of the photodetector produce a photocurrent in response to the incident light. The photocurrent is then transmitted to a minority-carrier injector that is positioned near the DMOS transistor. The transmitted current creates a forward-bias condition that induces the injector to introduce minority carriers into a drift region of the DMOS transistor. The introduction of minority carriers within the drift region affects the conductivity of the DMOS transistor.